
#include "mcf5213.h"
#include "vectors_DEV5213CF.h"
#include "RS-485.h"		// fichero que contiene las rutinas para atender la interrupcion



static void __attribute__ ((interrupt))
AccessErrorIsr()
{
 ;
}

static void __attribute__ ((interrupt))
AddressErrorIsr()
{
  ;
}

static void __attribute__ ((interrupt))
IllegalInstructionIsr()
{
  ;
}

static void __attribute__ ((interrupt))
UnhandledInterrupt()
{
  ;
}

static void __attribute__ ((interrupt))
PrivilegeViolationIsr()
{
  ;
}

static void __attribute__ ((interrupt))
TraceIsr()
{
  ;
}

static void __attribute__ ((interrupt))
UnimpOpcodeAIsr()
{
  ;
}

static void __attribute__ ((interrupt))
UnimpOpcodeFIsr()
{
  ;
}

static void __attribute__ ((interrupt))
DebugIsr()
{
  ;
}

static void __attribute__ ((interrupt))
FormatErrorIsr()
{
  ;
}

static void __attribute__ ((interrupt)) 
TrapIsr() 
{
  ;
}
 
static void __attribute__ ((interrupt)) 
EdgePortFlag1Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
EdgePortFlag2Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
EdgePortFlag3Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
EdgePortFlag4Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
EdgePortFlag5Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
EdgePortFlag6Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
EdgePortFlag7Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
SoftwareWatchdogTimeoutIsr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
DMA0TransferCompleteIsr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
DMA1TransferCompleteIsr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
DMA2TransferCompleteIsr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
DMA3TransferCompleteIsr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
UART0Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
UART1Isr() 
{
	 input_s();						// Atencion a la interrupcion
}

static void __attribute__ ((interrupt)) 
UART2Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
I2Cisr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
QSPIisr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
TMR0Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
TMR1Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
TMR2Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
TMR3Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
MessageBuffer0Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
MessageBuffer1Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
MessageBuffer2Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
MessageBuffer3Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
MessageBuffer4Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
MessageBuffer5Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
MessageBuffer6Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
MessageBuffer7Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
MessageBuffer8Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
MessageBuffer9Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
MessageBuffer10Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
MessageBuffer11Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
MessageBuffer12Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
MessageBuffer13Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
MessageBuffer14Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
MessageBuffer15Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
ErrorInterruptIsr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
BusOffInterruptIsr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
TimerOverflowIsr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
PulseAccumulatorInputIsr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
PulseAccumulatorOverflowIsr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
Timer0Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
Timer1Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
Timer2Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
Timer3Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
LVDIsr() 
{
  ;
}
 
static void __attribute__ ((interrupt)) 
ADCAconversionCompleteIsr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
ADCBconversionCompleteIsr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
ADCisr() 
{
  ;
}


static void __attribute__ ((interrupt)) 
PIT0Isr()
{

}

static void __attribute__ ((interrupt)) 
PIT1Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
SGFMbufferEmptyIsr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
SGFMcommandCompleteIsr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
ProtectionViolationIsr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
AccessError5213Isr() 
{
  ;
}

static void __attribute__ ((interrupt)) 
PWMInterruptIsr() 
{
  ;
}

 
/* Vector Table */
const static volatile unsigned long pe_vector_table[254] __attribute__ ((section (".vctr"))) = 
{
/* The linker scipt specifies the initial SP and PC values
   See the linker section ".pevector"
   We omit the first two vector table entries here */

(long) &AccessErrorIsr,  //vector 2
(long) &AddressErrorIsr, 
(long) &IllegalInstructionIsr,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &PrivilegeViolationIsr,
(long) &TraceIsr,
(long) &UnimpOpcodeAIsr,  //vector 10
(long) &UnimpOpcodeFIsr,
(long) &DebugIsr,  
(long) &UnhandledInterrupt,
(long) &FormatErrorIsr,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  //vector 20
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  //vector 30
(long) &UnhandledInterrupt,
(long) &TrapIsr,  
(long) &TrapIsr,
(long) &TrapIsr,
(long) &TrapIsr,
(long) &TrapIsr,
(long) &TrapIsr,
(long) &TrapIsr,
(long) &TrapIsr,
(long) &TrapIsr,  //vector 40
(long) &TrapIsr,
(long) &TrapIsr,  
(long) &TrapIsr,
(long) &TrapIsr,
(long) &TrapIsr,
(long) &TrapIsr,
(long) &TrapIsr,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  //vector 50
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  //vector 60
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &EdgePortFlag1Isr,  //MCF5213 interrupt sources begin here
(long) &EdgePortFlag2Isr,
(long) &EdgePortFlag3Isr,
(long) &EdgePortFlag4Isr,
(long) &EdgePortFlag5Isr,
(long) &EdgePortFlag6Isr,  //vector 70
(long) &EdgePortFlag7Isr,
(long) &SoftwareWatchdogTimeoutIsr,  
(long) &DMA0TransferCompleteIsr,
(long) &DMA1TransferCompleteIsr,
(long) &DMA2TransferCompleteIsr,
(long) &DMA3TransferCompleteIsr,
(long) &UART0Isr,
(long) &UART1Isr,
(long) &UART2Isr,
(long) &UnhandledInterrupt,  //vector 80
(long) &I2Cisr,  
(long) &QSPIisr,
(long) &TMR0Isr,  
(long) &TMR1Isr,
(long) &TMR2Isr,
(long) &TMR3Isr,
(long) &MessageBuffer0Isr,
(long) &MessageBuffer1Isr,
(long) &MessageBuffer2Isr,
(long) &MessageBuffer3Isr,  //vector 90
(long) &MessageBuffer4Isr,  
(long) &MessageBuffer5Isr,
(long) &MessageBuffer6Isr,
(long) &MessageBuffer7Isr,
(long) &MessageBuffer8Isr,
(long) &MessageBuffer9Isr,
(long) &MessageBuffer10Isr,
(long) &MessageBuffer11Isr,
(long) &MessageBuffer12Isr,
(long) &MessageBuffer13Isr,  //vector 100
(long) &MessageBuffer14Isr,  
(long) &MessageBuffer15Isr,
(long) &ErrorInterruptIsr,  
(long) &BusOffInterruptIsr,
(long) &TimerOverflowIsr,
(long) &PulseAccumulatorInputIsr,
(long) &PulseAccumulatorOverflowIsr,
(long) &Timer0Isr,
(long) &Timer1Isr,
(long) &Timer2Isr,  //vector 110
(long) &Timer3Isr,  
(long) &LVDIsr,
(long) &ADCAconversionCompleteIsr,  
(long) &ADCBconversionCompleteIsr,
(long) &ADCisr,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,
(long) &PIT0Isr,  //vector 119 points to handler for PIT0  
(long) &PIT1Isr,  //vector 120
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &SGFMbufferEmptyIsr,
(long) &SGFMcommandCompleteIsr,
(long) &ProtectionViolationIsr,
(long) &AccessError5213Isr,
(long) &PWMInterruptIsr,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,  //vector 130
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,  //vector 140
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,  //vector 150
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,  //vector 160
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,  //vector 170
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,  //vector 180
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,  //vector 190
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,  //vector 200
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,  //vector 210
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,  //vector 220
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,  //vector 230
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,  //vector 240
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,  //vector 250
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,  
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt,
(long) &UnhandledInterrupt
};

